Product Summary
The HD64F7047F50V is a single-chip RISC (Reduced Instruction Set Computer) microprocessor integrated a Renesas-original RISC CPU core with peripheral functions required for system configuration. The HD64F7047F50V CPU has a RISC-type instruction set. Most instructions can be executed in one state (one system clock cycle), which greatly improves instruction execution speed. In addition, the HD64F7047F50V 32-bit internal-bus architecture enhances data processing power. With this CPU, the HD64F7047F50V has become possible to assemble low cost, high performance/high-functioning systems, even for applications that were previously impossible with microprocessors, such as real-time control, which demands high speeds.
Parametrics
HD64F7047F50V absolute maximum ratings: (1)Power supply voltage, VCC: –0.3 to +7.0 V; (2)Input voltage, Vin: –0.3 to VCC +0.3 V; (3)Analog supply voltage, AVCC: –0.3 to +7.0 V; (4)Analog input voltage, VAN: –0.3 to AVCC +0.3 V; (5)Operating temperature, Topr: –40 to +85℃; (6)Storage temperature Tstg:–55 to +125℃.
Features
HD64F7047F50V features: (1)Instruction length: 16-bit fixed length for improved code efficiency; (2)Load-store architecture (basic operations are executed between registers); (3)Sixteen 32-bit general registers; (4)Five-stage pipeline; (5)On-chip multiplier: multiplication operations (32 bits × 32bits → 64 bits) executed in two to four cycles; (6)C language-oriented 62 basic instructions; (7)Data transfer controller (DTC); (8)Multifunction timer/pulse unit (MTU); (9)Motor management timer(MMT); (10)Compare match timer (CMT); (11)Watchdog timer (WDT); (12)Asynchronous or clocked synchronous serial communication interface(SCI); (13)10-bit A/D converter; (14)Clock pulse generator; (15)Controller area network2 (HCAN2); (16)User break controller (UBC); (17)High-performance user debug interface (H-UDI); (18)Advanced user debugger (AUD).
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
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HD64F7047F50V |
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Data Sheet |
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